| No. | Partie # | Fabricant | Description | Fiche Technique |
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Fairchild |
Dual P-Channel MOSFET -3.5A, -20V. RDS(ON) = 0.1Ω @ VGS = 10V High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ___________________________________ |
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Fairchild |
N-Channel Logic Level Enhancement Mode Field Effect Transistor 1.3 A, 20 V. RDS(ON) = 0.21 Ω @ VGS= 2.7 V RDS(ON) = 0.16 Ω @ VGS= 4.5 V. Industry standard outline SOT-23 surface mount package using poprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extre |
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Fairchild |
Dual N-Channel MOSFET 3.5 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V, RDS(ON) = 0.200 Ω @ VGS = 4.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. |
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Fairchild |
N-Channel Logic Level Enhancement Mode Field Effect Transistor 1.7 A, 20 V. RDS(ON) = 0.14 Ω @ VGS= 2.7 V RDS(ON) = 0.11 Ω @ VGS= 4.5 V. Industry standard outline SOT-23 surface mount package using poprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extre |
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Fairchild |
Single N-channel MOSFET 9.9 A, 20 V. RDS(ON) = 0.015 Ω @ VGS= 4.5 V. RDS(ON) = 0.020 Ω @ VGS= 2.7 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. _____________________________________ |
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Fairchild |
P-Channel Enhancement Mode Field Effect Transistor • −0.18A, −60V. RDS(ON) = 5 Ω @ VGS = −10 V • Voltage controlled p-channel small signal switch • High density cell design for low RDS(ON) • High saturation current DD SOT-23 S G Absolute Maximum Ratings TA=25oC unless otherwise noted Symbol Par |
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Fairchild |
P-Channel Enhancement Mode Field Effect Transistor |
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Fairchild |
N-Channel Logic Level Enhancement Mode Field Effect Transistor 1.1A, 30V. RDS(ON) = 0.25Ω @ VGS = 4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capabil |
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Fairchild |
Dual N-Channel MOSFET 2.0A, 50V. RDS(ON) = 0.3Ω @ VGS = 10V High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ______________________________________ |
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Fairchild |
P-Channel Logic Level Enhancement Mode Field Effect Transistor -1 A, -20 V, RDS(ON) = 0.41 Ω @ VGS= -2.7 V RDS(ON) = 0.3 Ω @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.0V. Proprietary package design using copper lead frame for superior thermal and e |
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Fairchild |
P-Channel Logic Level Enhancement Mode Field Effect Transistor -0.85A, -20V. RDS(ON) = 0.5Ω @ VGS = -4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capa |
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Fairchild |
Complementary MOSFET N-Channel 4.3A, 30V, RDS(ON)=0.08Ω @ VGS=10V. P-Channel -3.4A, -30V, RDS(ON)=0.13Ω @ VGS=-10V. High density cell design or extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Matched pair for equa |
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Fairchild |
Dual P-Channel MOSFET • -2.8 A, -20 V. RDS(on) = 0.14 Ω @ VGS = -4.5 V RDS(on) = 0.19 Ω @ VGS = -2.7 V RDS(on) = 0.20 Ω @ VGS = -2.5 V. • High density cell design for extremely low RDS(on). • High power and current handling capability in a widely used surface mount packa |
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Fairchild |
Dual P-Channel MOSFET -2.9A, -30V. RDS(ON) = 0.13Ω @ VGS = -10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ________________________________ |
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Fairchild |
Dual N-Channel MOSFET 3.0 A, 50 V. RDS(ON) = 0.130 Ω @ VGS = 10 V, RDS(ON) = 0.200 Ω @ VGS = 4.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. |
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Fairchild |
P-Channel Logic Level Enhancement Mode Field Effect Transistor -0.9 A, -30 V. RDS(ON) = 0.5 Ω @ VGS = -4.5 V RDS(ON) = 0.3 Ω @ VGS = -10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for e |
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Fairchild |
Single N-channel MOSFET • 7.4 A, 20 V. RDS(ON) = 0.022 Ω @ VGS = 4.5 V RDS(ON) = 0.028 Ω @ VGS = 2.7 V • Fast switching speed • Low gate charge (11nC typical) • High performance trench technology for extremely low RDS(ON) • High power and current handling capability in |
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Fairchild |
Single P-Channel MOSFET -6.5A, -20V. RDS(ON) = 0.035Ω @ VGS = -4.5V RDS(ON) = 0.05Ω @ VGS = -2.7V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. _______________________________________ |
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Fairchild |
Dual N&P-Channel MOSFET N-Channel 5.3A, 30V, RDS(ON)=0.035Ω @ VGS=10V. P-Channel -4.0A, -30V, RDS(ON)=0.065Ω @ VGS=-10V. High density cell design or extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual (N & P-Channe |
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Fairchild |
Single P-Channel MOSFET -3.4A, -30V. RDS(ON) = 0.13Ω @ VGS = -10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Rugged and reliable. __________________________________________________ |
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