The ICSSSTUAF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8V CMOS drivers optimized to drive the DDR2 DIMM load. They provide 50% more dynamic driver strength than the standard SSTU32.
• 14-bit 1:2 registered buffer with parity check functionality
• Supports SSTL_18 JEDEC specification on data inputs
and outputs
• 50% more dynamic driver strength than standard
SSTU32864
• Supports LVCMOS switching levels on C1 and RESET
inputs
• Low voltage operation: VDD = 1.7V to 1.9V
• Available in 150 BGA package
Applications
• DDR2 Memory Modules
• Provides complete DDR DIMM solution with
ICS98ULPA877A or IDTCSPUA877A
• Ideal for DDR2 400, 533, and 667
14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
1
ICSSSTUAF32869A
7095/13
ICSSSTUAF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | ICSSSTUAF32865A |
IDT |
25-BIT CONFIGURABLE REGISTERED BUFFER | |
2 | ICSSSTUAF32866B |
IDT |
25-BIT CONFIGURABLE REGISTERED BUFFER | |
3 | ICSSSTUAF32866C |
IDT |
25-BIT CONFIGURABLE REGISTERED BUFFER | |
4 | ICSSSTUAF32868A |
IDT |
28-BIT CONFIGURABLE REGISTERED BUFFER | |
5 | ICSSSTUAF32868B |
IDT |
28-BIT CONFIGURABLE REGISTERED BUFFER | |
6 | ICSSSTUA32S869B |
ICS |
14-Bit Configurable Registered Buffer | |
7 | ICSSSTUAH32865A |
IDT |
25-BIT CONFIGURABLE REGISTERED BUFFER | |
8 | ICSSSTUAH32868A |
IDT |
28-BIT CONFIGURABLE REGISTERED BUFFER | |
9 | ICSSSTU32864 |
ICS |
25-Bit Configurable Registered Buffer | |
10 | ICSSSTU32866 |
Integrated Circuit System |
25-Bit Configurable Registered Buffer | |
11 | ICSSSTUB32864A |
ICS |
25-Bit Configurable Registered Buffer | |
12 | ICSSSTUB32866B |
ICS |
25-Bit Configurable Registered Buffer |