30N50Q - IXYS

30N50Q Power MOSFETs

HiPerFETTM Power MOSFETs ISOPLUS247TM IXFR 30N50Q (Electrically Isolated Back Surface) IXFR 32N50Q N-Channel Enhancement Mode High dV/dt, Low trr, HDMOSTM Family VDSS ID25 500 V 29 A 500 V 30 A trr £ 250 ns RDS(on) 0.16 W 0.15 W Preliminary data Symbol VDSS VDGR VGS VGSM ID25 I DM I AR EAS EAR dv/dt PD TJ TJM Tstg TL VISOL Weight Test Conditions.

Features

• Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation
• Low drain to tab capacitance(<50pF)
• Low RDS (on) HDMOSTM process
• Rugged polysilicon gate cell structure
• Unclamped Inductive Switching (UIS) rated
• Fast intrinsic Rectifier Symbol Test Conditions VDSS V GS(th) IGSS IDSS RDS(on) VGS = 0 V, ID = 1mA V = V , I = 4mA DS GS D VGS = ±20 VDC, VDS = 0 VDS = VDSS VGS = 0 V VGS = 10 V, ID = IT Notes 1, 2 Characteristic Values (TJ = 25°C, unless otherwise specified) min. typ. max. 500 V 2 4V ±100 nA TJ = 25°C TJ.