STP19NB20 - ST Microelectronics

STP19NB20 N-CHANNEL MOSFET

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charg.

Features

VDS VDGR VGS ID ID IDM (l) PTOT dv/dt (1) VISO Tstg Tj August 2002 Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature I PAK (Tabless TO-220) INTERNAL SCHEMATIC DIAGRAM 2 12 3 Value STP(B)19NB20(-1) 200 200 ± 30 19 12 76 125 1 5.5
  –65 to 150 150 (1)ISD ≤ 19 A, di/dt ≤300A/µs,.