1 1 Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an TO-220 TO-220FP advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and u.
NTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (
• ) P tot dv/dt( 1) V ISO Ts tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 kΩ ) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating F actor Peak Diode Recovery voltage slope Insulation W ithstand Voltage (DC) Storage Temperature Max. Operating Junction T emperature 5.7 3.6 22.8 125 1.0 4 -65 to 150 150
( 1) ISD ≤ 5.76 A, di/dt ≤ 200 A/µs, .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | P6NB50FP |
STMicroelectronics |
STP6NB50FP | |
2 | P6N25 |
ST Microelectronics |
STP6N25 | |
3 | P6N60 |
Fairchild Semiconductor |
FQP6N60 | |
4 | P6N60FI |
ST Microelectronics |
STP6N60FI | |
5 | P6N70 |
Fairchild Semiconductor |
FQP6N70 | |
6 | P6N70A |
Fairchild Semiconductor |
SSP6N70A | |
7 | P6N80 |
Fairchild Semiconductor |
FQP6N80 | |
8 | P6NA60 |
STMicroelectronics |
STP6NA60 | |
9 | P6NA60FI |
ST Microelectronics |
STP6NA60FI | |
10 | P6NA60FP |
STMicroelectronics |
STP6NA60FP | |
11 | P6NC60 |
ST Microelectronics |
STP6NC60 | |
12 | P6NC60FP |
STMicroelectronics |
STP6NC60FP |