The HEF4557B is a static clocked serial shift register whose length may be programmed to be any number of bits between 1 and 64. The number of bits selected is equal to the sum of the subscripts of the enabled length control inputs (L1, L2, L4, L8, L16, and L32) plus one. Serial data may be selected from the DA or DB data inputs with the A/B select input. T.
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information All types operate from 40 C to +85 C
Type number
Package
Name
Description
HEF4557BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version SOT109-1
Nexperia
4. Functional diagram
HEF4557B
Product data sheet
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The HEF4557B is a static clocked serial shift register whose length may be programmed to be any number of bits between .
The HEF4557B is a static clocked serial shift register whose length may be programmed to be any number of bits between 1.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF4555B |
NXP |
1-of-4 decoder/demultiplexer | |
2 | HEF4555B |
Philips |
Dual 1-of-4 decoder/demultiplexer | |
3 | HEF4555B |
nexperia |
1-of-4 decoder/demultiplexer | |
4 | HEF4555B-Q100 |
nexperia |
1-of-4 decoder/demultiplexer | |
5 | HEF4556B |
NXP |
Dual 1-of-4 decoder/demultiplexer | |
6 | HEF4502B |
NXP |
Strobed hex inverter/buffer | |
7 | HEF4505B |
NXP |
64-bit/ 1-bit per word random access read/write memory | |
8 | HEF4508B |
NXP |
Dual 4-bit latch | |
9 | HEF4510B |
NXP |
BCD up/down counter | |
10 | HEF4511B |
NXP |
BCD to 7-segment latch/decoder/driver | |
11 | HEF4511B |
Philips |
BCD to 7-segment latch/decoder/driver | |
12 | HEF4512B |
NXP |
8-input multiplexer with 3-state output |