HEF4519B - NXP

HEF4519B Quadruple 2-input multiplexer

The HEF4519B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources. The ‘A’ inputs are selected when SA is HIGH, the ‘B’ inputs when SB is HIGH. When SA and SB are HIGH, the output (On) is the logical EXCL.

Features

e outputs utilize standard buffers for best performance. Fig.1 Functional diagram. PINNING SA, SB A0 to A3 Bo to B3 O0 to O3 selects inputs (active HIGH) multiplexer inputs multiplexer inputs multiplexer outputs FAMILY DATA, IDD LIMITS category MSI Fig.2 Pinning diagram. See Family Specifications HEF4519BP(N): HEF4519BD(F): HEF4519BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America January 1995 2 Philips Semiconductors Product specification Quadruple 2-input multiplexer HEF4519B MSI Fig.3 L.