e e h S a at .D w w FEATURES w 2 TC58DVM82A1FT00 The device is a 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 2048 blocks. The device uses single power supply (2.7 V to 3.6 V for VCC). The device has a 528-byte static register which allows program and read data to .
w 2 TC58DVM82A1FT00 The device is a 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 2048 blocks. The device uses single power supply (2.7 V to 3.6 V for VCC). The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes x 32 pages). The device is a serial-type memory device which utilizes the I/O pins for both.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC58DVM72A1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
2 | TC58DVM72F1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
3 | TC58DVM92A1FT0 |
Toshiba |
512M-Bit CMOS NAND EPROM | |
4 | TC58DVM92A1FT00 |
Toshiba |
512M-Bit CMOS NAND EPROM | |
5 | TC58DVM92A5TA00 |
Toshiba |
512M-BIT (64M x 8 BITS) CMOS NAND E2PROM | |
6 | TC58DVM92A5TAI0 |
Toshiba |
512M-BIT (64M x 8 BITS) CMOS NAND E2PROM | |
7 | TC58DVG02A1F00 |
Toshiba |
1 Gbit (128M x *8its) CMOS NAND EPROM | |
8 | TC58DVG02A1FI0 |
Toshiba |
1 Gbit (128M x *8its) CMOS NAND EPROM | |
9 | TC58DVG02A1FT00 |
Toshiba Semiconductor |
MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS | |
10 | TC58DVG3S0ETA00 |
Toshiba |
8-GBIT (1G x 8-BIT) CMOS NAND E2PROM | |
11 | TC58DAM72A1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
12 | TC58DAM72F1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM |