The TC58DxM72x1xxxx is a 128-Mbit (138,412,032) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes/264 words u 32 pages u 1024 blocks. The device uses dual power supplies (2.7 V to 3.6 V for VCC and 1.65 V to 1.95 V for VCCQ ). The device has a 528-byte/264-words static register which allows program and read.
x Organization TC58DxM72A1xxxx Memory cell allay 528 u 32K u 8 Register 528 u 8 Page size 528 bytes Block size (16K 512) bytes x Modes Read, Reset, Auto Page Program Auto Block Erase, Status Read x Mode control Serial input/output Command control x Power supply TC58DVM72x1xxxx Vcc: 2.7V to 3.6V Vccq: 2.7V to 3.6V x Program/Erase Cycles 1E5 cycle (with ECC) x Access time Cell array to register 25 Ps max Serial Read Cycle 50 ns min x Operating current Read (50 ns cycle) 10 mA typ. Program (avg.) 10 mA typ. Erase (avg.) 10 mA typ. Standby 50 PA max. x Package TSOP I 48-P-1220-0.5.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC58DAM72F1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
2 | TC58DVG02A1F00 |
Toshiba |
1 Gbit (128M x *8its) CMOS NAND EPROM | |
3 | TC58DVG02A1FI0 |
Toshiba |
1 Gbit (128M x *8its) CMOS NAND EPROM | |
4 | TC58DVG02A1FT00 |
Toshiba Semiconductor |
MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS | |
5 | TC58DVG3S0ETA00 |
Toshiba |
8-GBIT (1G x 8-BIT) CMOS NAND E2PROM | |
6 | TC58DVM72A1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
7 | TC58DVM72F1FT00 |
Toshiba |
(TC58DxM72) 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM | |
8 | TC58DVM82A1FT00 |
Toshiba Semiconductor |
256-MBIT (32M x 8 BITS) CMOS NAND E2PROM | |
9 | TC58DVM92A1FT0 |
Toshiba |
512M-Bit CMOS NAND EPROM | |
10 | TC58DVM92A1FT00 |
Toshiba |
512M-Bit CMOS NAND EPROM | |
11 | TC58DVM92A5TA00 |
Toshiba |
512M-BIT (64M x 8 BITS) CMOS NAND E2PROM | |
12 | TC58DVM92A5TAI0 |
Toshiba |
512M-BIT (64M x 8 BITS) CMOS NAND E2PROM |