STP16NB25 - ST Microelectronics

STP16NB25 N-CHANNEL Power MOSFET

Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charg.

Features

g Tj March 1999 Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating Factor Peak Diode Recovery voltage slope Insulation W ithstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature o TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM Value STP16NB25 ST P16NB25F P 250 250 ± 30 16 10 64 140 1.12 5.5 -----65 to 150 150 ( 1) ISD ≤ 16A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Un it V V.