www.DataSheet4U.com The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-.
al interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 73237 S-50392Rev. A, 14-Mar-05 www.vishay.com 1 SPICE Device Model Si4900DY Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current a Symbol Test Condition Simulated Data 2 105 0.046 0.057 16 0.80 Measured Data Unit V.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SI4904DY |
Vishay Siliconix |
Dual N-Channel MOSFET | |
2 | SI4908DY |
Vishay Siliconix |
Dual N-Channel 40-V (D-S) MOSFET | |
3 | SI4910DY |
Vaishali Semiconductor |
Dual N-Channel 40-V (D-S) MOSFET | |
4 | SI4911DY |
Vishay Siliconix |
Dual P-Channel 20-V (D-S) MOSFET | |
5 | SI4913DY |
Vishay Siliconix |
Dual P-Channel 20-V (D-S) MOSFET | |
6 | SI4914BDY |
Vishay Siliconix |
Dual N-Channel MOSFET | |
7 | SI4914DY |
Vishay Siliconix |
Dual N-Channel 30-V (D-S) MOSFET | |
8 | SI4916DY |
Vishay Siliconix |
Dual N-Channel MOSFET | |
9 | SI4921DY |
Vishay Siliconix |
Dual P-Channel MOSFET | |
10 | Si4922BDY |
Vishay |
Dual N-Channel 30-V (D-S) MOSFET | |
11 | SI4922DY |
Vishay Siliconix |
Dual N-Channel MOSFET | |
12 | SI4925BDY |
Vishay Siliconix |
Dual P-Channel MOSFET |