SI1907DL - Vishay Siliconix

SI1907DL Dual P-Channel 1.8-V (G-S) MOSFET

www.DataSheet4U.com The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 5-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-d.

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hysical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 71526 S-50232Rev. B, 28-Feb-05 www.vishay.com 1 SPICE Device Model Si1907DL Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current a Symbol Test Condition Simulated Data 0.78 5.8 0.54 0.77 1.05 1.19 −0.76 Measured.