MTD9N10E - Motorola

MTD9N10E TMOS POWER FET

www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTD9N10E/D Designer's TMOS E-FET .™ Power Field Effect Transistor DPAK for Surface Mount N–Channel Enhancement–Mode Silicon Gate This advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers.

Features

2500 Unit Tape & Reel, Add T4 Suffix to Part Number
• Replaces MTD6N10 MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain
  –Source Voltage Drain
  –Gate Voltage (RGS = 1.0 MΩ) Gate
  –Source Voltage — Continuous Gate
  –Source Voltage — Non
  –Repetitive (tp ≤ 10 ms) Drain Current — Continuous Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp ≤ 10 µs) Total Power Dissipation Derate above 25°C Total Power Dissipation @ TA = 25°C, when mounted to minimum recommended pad size Operating and Storage Temperature Range Single Pulse Drain
  –to
  –Source Avalanche Energy — Starting TJ = 25°.