IS42S16160B - Integrated Silicon Solution

IS42S16160B 256-MBIT SYNCHRONOUS DRAM

A0-A12 A0-A9 BA0, BA1 DQ0 to DQ7 CLK CKE CS RAS CAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Row Address Strobe Command Column Address Strobe Command WE DQM VDD Vss VDDQ VssQ NC Write Enable Data Input/Output Mask Power Ground Power Supply for I/O Pin Ground for I/O Pin No Connection In.

Features

• Clock frequency: 166, 143 MHz
• Fully synchronous; all signals referenced to a positive clock edge www.DataSheet4U.com
• Internal bank OVERVIEW ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as follows. for hiding row access/precharge VDDQ VDD 3.3V 3.3V 3.3V 3.3V
• Power supply IS42S83200B 54-pin TSOPII IS42S16160B 54-pin TSOPII 54-ball BGA IS42S83200B IS42S16160B
• LVTTL interface 8M x 8 x 4 Banks 4M x16x4 Banks
• Programmable burst len.