EM639165 - Etron Technology Inc.

EM639165 8Mega x 16bits SDRAM

Table 3. Pin Details of EM639165 Symbol CLK CKE BA0,BA1 Type Input Input Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Clock Enable: CKE activates (HIGH) and deactivates (LOW) the CLK signal. If.

Features

• Fast access time from clock: 4.5/5/5.4 ns
• Fast clock rate: 200/166/143 MHz
• Fully synchronous operation
• Internal pipelined architecture
• 2M word x 16-bit x 4-bank
• Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function
• Auto Refresh and Self Refresh
• 4096 refresh cycles/64ms
• CKE power down mode
• Single +3.3V ± 0.3V power supply
• Industrial Temperature: -40~85°C
• Interface: LVTTL
• 54-pin 400 mil plastic TSOP II package - Pb free and Halogen free
• 54-ball 8.0 x 8.0 x 1.2mm (max) F.