Symbol CLK Type Input 1M x 16 SDRAM EM636165-XXI Table 1. Pin Details of EM636165 Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Clock Enable: CKE activates(HIGH) and deactivates(LOW) the CLK signal. If.
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• Fast access time: 5/5.5/6.5/7.5 ns Fast clock rate: 166/143/125/100 MHz Self refresh mode: standard and low power Internal pipelined architecture 512K word x 16-bit x 2-bank Programmable Mode registers - CAS# Latency: 1, 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: interleaved or linear burst - Burst stop function Individual byte controlled by LDQM and UDQM Auto Refresh and Self Refresh 4096 refresh cycles/64ms CKE power down mode Single +3.3V±0.3V power supply Interface: LVTTL 50-pin 400 mil plastic TSOP II package Lead Free Package available
EM636165-XXI
Prelim.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | EM636165 |
Etron |
1M x 16 Synchronous DRAM | |
2 | EM636327 |
Etron Technology Inc. |
512K x 32 High Speed Synchronous Graphics DRAM(SGRAM) | |
3 | EM6352 |
EM Microelectronic - MARIN SA |
Voltage Detecto | |
4 | EM6353 |
EM Microelectronic - MARIN SA |
Reset Circuit | |
5 | EM6354 |
EM Microelectronic - MARIN SA |
Reset Circuit | |
6 | EM637327 |
Etron Technology Inc. |
1Mega x 32 SGRAM | |
7 | EM638165 |
Etron Technology |
4M x 16 bit Synchronous DRAM | |
8 | EM638165TS |
Etron Technology |
4M x 16 bit Synchronous DRAM | |
9 | EM638325 |
Etron Technology |
2M x 32 Synchronous DRAM | |
10 | EM639165 |
Etron Technology Inc. |
8Mega x 16bits SDRAM | |
11 | EM639165TS |
Etron Technology |
8M x 16 bit Synchronous DRAM | |
12 | EM639325 |
Etron Technology |
4M x 32 bit Synchronous DRAM |