P3NB60FP - ST Microelectronics

P3NB60FP STP3NB60FP

Using the latest high voltage MESH OVERLAY™ process, SGS-Thomson has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and s.

Features

j March 1998 Drain-source Voltage (V GS = 0) Gate-source Voltage Drain- gate Voltage (R GS = 20 k Ω ) Drain Current (continuous) at T c = 25 C o m o .c U 4 t e e h S a t a .D w w w 3 1 2 3 2 1 TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM Parameter Value 600 Unit V V V A A STP3NB60 STP3NB60FP 600 ± 30 o Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 o C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature m o .c U 4 t e e h S a at .D w w w 2.1 8.