M6MGT32BS8WG - Renesas

M6MGT32BS8WG CMOS SRAM

The M6MGB/T32BS8WG is a Stacked Chip Scale Package (S-CSP) that contents 32M-bit Flash memory and 8M-bit SRAM in a 66-pin Stacked CSP. 32M-bit Flash memory is a 2,097,152 words, single power supply and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR (Divided bit-line NOR) architecture for the memory cel.

Features

Access Time Flash SRAM 85ns (Max.) 85ns (Max.) F-VCC =VCC=2.7 ~ 3.0V Ta=-40 ~ 85 °C 66 pin S-CSP Ball pitch 0.80mm Supply Voltage Ambient Temperature Package Application Mobile communication products PIN CONFIGURATION (TOP VIEW) INDEX(Laser Marking) A B C D NC NC NC A5 A4 A0 F-CE# NC NC A18 A17 A7 A6 A3 A2 A1 DQ9 DQ8 DQ0 DQ10 S-LB# F-WP# S-GND F-WE# www.DataSheet4U.com A16 A8 S-UB# F-A20 NC F-RP# F-RY/BY# A11 A15 A14 A13 E S-OE# F-A19 A10 A9 DQ12 DQ13 DQ15 11.0 mm F G H J K L M DQ11 F-GND S-CE2 DQ6 DQ4 DQ5 S-WE# A12 DQ14 F-GND F-OE# DQ2 DQ3 S-VCC NC NC NC S-CE1# DQ1.