IS45S16100C1 - Integrated Silicon Solution

IS45S16100C1 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

ISSI’s 16Mb Synchronous DRAM IS45S16100C1 is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. PIN CONFIGURATIONS 50-Pin TSOP (Type II) VDD DQ0 DQ1 GNDQ DQ2 DQ3 VDDQ DQ4 DQ5 GND.

Features

• Clock frequency: 143 MHz
• Fully synchronous; all signals referenced to a positive clock edge
• Two banks can be operated simultaneously and independently
• Dual internal bank controlled by A11 (bank select)
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
  – (1, 2, 4, 8, full page)
• Programmable burst sequence: Sequential/Interleave
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge comm.