PIN # PIN NAME TYPE DESCRIPTION 3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair The power-up default is PCI0 output, but this pin may also be used as a Clock Request control of SRC pair 0 or SRC pair 2 via SMBus. Before configuring this pin as a Clock Request Pin, the PCI output must first be disabled in byte 2, bit 0 of SMBus a.
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• 2 - CPU differential low power push-pull pairs 7 - SRC differential low power push-pull pairs 1 - CPU/SRC selectable differential low power push-pull pair 1 - SRC/DOT selectable differential low power push-pull pair 5 - PCI, 33MHz 1 - PCI_F, 33MHz free running 1 - USB, 48MHz 1 - REF, 14.318MHz
Features/Benefits:
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• Does not require external pass transistor for voltage regulator Integrated series resistors on differential outputs, Zo=50W Supports spread spectrum modulation, default is 0.5% down spread Uses external 14.318MHz crystal, external crystal load caps are requi.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | ICS9LPRS501 |
Renesas |
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR | |
2 | ICS9LPRS501 |
IDT |
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR | |
3 | ICS9LPRS525 |
Integrated Device Technology |
56-pin CK505 | |
4 | ICS9LPRS525 |
Renesas |
56-pin CK505 | |
5 | ICS9LPRS535 |
Renesas |
VREG | |
6 | ICS9LPRS535 |
Integrated Device Technology |
48-pin CK505 | |
7 | ICS9LPRS545 |
Integrated Circuit Solution |
48-pin CK505 | |
8 | ICS9LPRS365 |
ICS |
64-Pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor | |
9 | ICS9LPRS436C |
Integrated Device Technology |
Low Power Clock | |
10 | ICS9LPRS462 |
Integrated Device Technology |
Low Power Clock | |
11 | ICS9LPRS464 |
Integrated Device Technology |
System Clock Chip | |
12 | ICS9LPRS480 |
Integrated Device Technology |
Programmable System Clock |