ICS9LPRS480 - Integrated Device Technology

ICS9LPRS480 Programmable System Clock

PIN # 1 2 3 4 5 PIN NAME GND48 SMBCLK SMBDAT VDD27 SRC7C_LPRS/27MHz_NS PIN TYPE GND IN I/O PWR OUT DESCRIPTION Ground pin for the 48MHz outputs Clock pin of SMBus circuitry, 5V tolerant. Data pin for SMBus circuitry, 5V tolerant. 3.3V Power supply for SRC/27MHz output and 27MHz SS PLL True clock of low power differential SRC clock pair. (no 50ohm shunt resis.

Features

• Integrated series resistors on all differential outputs.
• 1 - Greyhound compatible K8 CPU pairs
• 5 - low-power differential SRC pairs
• 2 - low-power differential chipset SouthBridge SRC pairs
• 1 - Selectable low-power differential 100MHz non-spread SATA/ SRC output
• 1 - Selectable low-power differential SRC / 27MHz Single Ended outputs
• 1 - Selectable HT3 100MHz low-power differential hypertransport clock / HT66MHz Single Ended outputs
• 1 - 48MHz USB clock
• 3 - 14.318MHz Reference clock
• 2 - low-power differential ATIG pairs
• 5- Dedicated CLKREQ# pins Pin Configuration HTT0C_LPRS/.