P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. PINNING - TO-92 variant (BSP204) PIN 1 2 3 gate drain source DESCRIPTION handbook, halfpage BSP204; BSP204A QUICK REFERENCE DATA SYMBOL −VDS −ID RDS(on) VGS(th) PARAMETER drain-source voltage drain current dr.
• Direct interface to C-MOS, TTL, etc.
• High-speed switching
• No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. PINNING - TO-92 variant (BSP204) PIN 1 2 3 gate drain source DESCRIPTION
handbook, halfpage
BSP204; BSP204A
QUICK REFERENCE DATA SYMBOL −VDS −ID RDS(on) VGS(th) PARAMETER drain-source voltage drain current drain-source on-resistance gate-source threshold voltage DC value −ID = 200 mA −VGS = 10 V −ID = 1 mA VGS = VDS CONDITIONS MAX. 200 250 15 2.8.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | BSP20 |
NXP |
NPN high-voltage transistors | |
2 | BSP204A |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
3 | BSP205 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
4 | BSP206 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
5 | BSP20A |
Kexin |
NPN Silicon Epitaxial Transistor | |
6 | BSP20AT1 |
Motorola Inc |
SOT.223 PACKAGE NPN SILICON HIGH VOLTAGE TRANSISTOR SURFACE MOUNT | |
7 | BSP220 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
8 | BSP225 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
9 | BSP230 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
10 | BSP250 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
11 | BSP254 |
NXP |
P-channel enhancement mode vertical D-MOS transistor | |
12 | BSP254A |
NXP |
P-channel enhancement mode vertical D-MOS transistor |