SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the.
(Set) Load “0” (Reset) L H L H H SD H L L H H D X X X h l Q H L H H L Q L H H L H OUTPUTS SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC
LOGIC SYMBOL
4 2 3 D SD Q CP CD Q 1 VCC = PIN 14 GND = PIN 7 6 5 12 11 10 D SD Q CP CD Q 13 8 9
* Both outputs will be HIGH while both SD and CD are LOW, but the output states are unpredictable if SD and CD go HIGH simultaneously. If the levels at the set and clear are near VIL maximum then we cannot guarantee to meet the minimum level for VOH. H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Don’t Care i, h (q) = Lower case letters indicate the .
Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.
SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TT.
SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLE.
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on.
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74LS73 |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops | |
2 | 74LS73 |
Hitachi Semiconductor |
Dual J-K Flip-Flops | |
3 | 74LS73 |
Motorola |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP | |
4 | 74LS73A |
Fairchild Semiconductor |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops | |
5 | 74LS73A |
Hitachi Semiconductor |
Dual J-K Flip-Flops | |
6 | 74LS74A |
Texas Instruments |
Dual D-Type Positive-Edge-Triggered Flip-Flop | |
7 | 74LS75 |
Fairchild Semiconductor |
Quad Latch | |
8 | 74LS75 |
Hitachi Semiconductor |
Quadruple Bistable Latches | |
9 | 74LS75 |
Motorola |
4-BIT D LATCH | |
10 | 74LS76 |
ON Semiconductor |
Dual JK Flip-Flop | |
11 | 74LS76 |
Hitachi Semiconductor |
Dual J-K Flip-Flop | |
12 | 74LS76 |
ETC |
DUAL JK FLIP-FLOP |