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74LS76 Dual JK Flip-Flop

SN74LS76A Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up t.

Features

e the state of the referenced input i, h (q) = (or output) one setup time prior to the HIGH
  –to
  –LOW clock transition 16 1 SOIC D SUFFIX CASE 751B GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current
  – High Output Current
  – Low Min 4.75 0 Typ 5.0 25 Max 5.25 70
  – 0.4 8.0 Unit V °C mA mA ORDERING INFORMATION Device SN74LS76AN SN74LS76AD Package 16 Pin DIP 16 Pin Shipping 2000 Units/Box 2500/Tape & Reel © Semiconductor Components Industries, LLC, 1999 1 December, 1999
  – Rev. 6 Publication Order Number: SN74LS76A/D SN7.

The same part from a different manufacturer

Datasheet 74LS76 - Hitachi Semiconductor 74LS76

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± .

Datasheet 74LS76 - ETC 74LS76

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Datasheet 74LS76 - Texas Instruments 74LS76

SN5476, SN54LS76A SN7476, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR SDLS121 – DECEMBER 1983 – REVISED MARCH 19.

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