TDA10021HT - NXP

TDA10021HT DVB-C channel receiver

GENERAL DESCRIPTION TDA10021HT The TDA10021HT is a single-chip DVB-C channel receiver for 4, 16, 32, 64, 128 and 256 QAM modulated signals. The device interfaces directly to the IF signal, which is sampled by a 10-bit ADC. The TDA10021HT performs the clock and the carrier recovery functions. The digital loop filters for both clock and carrier recovery are .

Features

• 4, 16, 32, 64, 128 and 256 Quadrature Amplitude Modulation (QAM) demodulator (DVB-C compatible: ETS 300-429/ITU-T J83 annex A/C)
• High performance for 256 QAM, especially for direct IF applications
• On-chip 10-bit Analog-to-Digital Converter (ADC)
• On-chip Phase-Locked Loop (PLL) for crystal frequency multiplication (typically 4 MHz crystal)
• Digital downconversion
• Programmable half Nyquist filter (roll off = 0.15 or 0.13)
• Two Pulse Width Modulated (PWM) AGC outputs with programmable take over point (for tuner and downconverter control)
• Clock timing recovery, with programmable 2nd-.