TC74HC112AF - Toshiba Semiconductor

TC74HC112AF Dual J-K Flip Flop

www.DataSheet.co.kr TC74HC112AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC112AP,TC74HC112AF,TC74HC112AFN Dual J-K Flip Flop with Preset and Clear The TC74HC112A is a high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaini.

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• High speed: fmax = 67 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 2 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ tpHL Balanced propagation delays: tpLH − Wide operating voltage range: VCC (opr) = 2 to 6 V Pin and function compatible with 74LS112 TC74HC112AFN Pin Assignment Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) 1 2007-10-01 Datasheet pdf - http://www.DataSheet4U.net/ www.Da.