TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP, TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. In acc.
• High speed: fmax = 63 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced p.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC74HC109AF |
Toshiba |
Dual J-K Flip-Flop | |
2 | TC74HC109AFN |
Toshiba |
DUAL J-K FLIP-FLOP | |
3 | TC74HC107AF |
Toshiba |
Dual J-K Flip-Flop | |
4 | TC74HC107AFN |
Toshiba |
DUAL J-K FLIP-FLOP | |
5 | TC74HC107AP |
Toshiba |
Dual J-K Flip-Flop | |
6 | TC74HC10AF |
Toshiba |
Triple 3-Input NAND Gate | |
7 | TC74HC10AFN |
Toshiba |
TRIPLE 3-INPUT NAND GATE | |
8 | TC74HC10AP |
Toshiba |
Triple 3-Input NAND Gate | |
9 | TC74HC112AF |
Toshiba Semiconductor |
Dual J-K Flip Flop | |
10 | TC74HC112AFN |
Toshiba Semiconductor |
Dual J-K Flip-Flop | |
11 | TC74HC112AP |
Toshiba Semiconductor |
Dual J-K Flip-Flop | |
12 | TC74HC11AF |
Toshiba |
Triple 3-Input AND Gate |