The TC58NVG6D2 is a single 3.3 V 64 Gbit (74,594,648,064 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (8192 + 640) bytes 256 pages 4124 blocks. The device has two 8832-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 8832-byte incre.
Organization Memory cell array Register Page size Block size
TC58NVG6D2G 8832 512K 8 8832 8 8832 bytes (2M 160 K) bytes
Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read Mode control Serial input/output Command control Number of valid blocks Min 3996 blocks Max 4124 blocks Power supply VCC 2.7 V to 3.6 V Access time Cell array to register Serial Read Cycle Program/Erase time Auto Page Program Auto Block Erase Operating current Read (25 ns cycle) Program (avg.) Erase (avg.) Stand.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC58NVG6DDJTA00 |
Toshiba |
64 GBIT (8G X 8 BIT) CMOS NAND E2PROM | |
2 | TC58NVG6T2FTA00 |
Toshiba |
64 GBIT (8G X 8 BIT) CMOS NAND E2PROM | |
3 | TC58NVG0S3AFT00 |
Toshiba |
1 GBit CMOS NAND EPROM | |
4 | TC58NVG0S3AFT05 |
Toshiba |
1 GBit CMOS NAND EPROM | |
5 | TC58NVG0S3ETA00 |
Toshiba |
1 GBIT (128M X 8 BIT) CMOS NAND E2PROM | |
6 | TC58NVG0S3HBAI4 |
Toshiba |
1G BIT (128M x 8-BIT) CMOS NAND E2PROM | |
7 | TC58NVG0S3HBAI6 |
Toshiba |
1G-BIT (128M x 8 BIT) CMOS NAND E2PROM | |
8 | TC58NVG0S3HTA00 |
Toshiba |
1 GBIT (128M x 8 BIT) CMOS NAND E2PROM | |
9 | TC58NVG0S3HTAI0 |
Toshiba |
1 GBIT (128M x 8 BIT) CMOS NAND E2PROM | |
10 | TC58NVG1S3BFT00 |
Toshiba |
2-GBit CMOS NAND EPROM | |
11 | TC58NVG1S3EBAI4 |
Toshiba |
2 GBIT (256M x 8-BIT) CMOS NAND E2PROM | |
12 | TC58NVG1S3ETA00 |
Toshiba |
2 GBIT (256M x 8 BIT) CMOS NAND E2PROM |