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SI9936BDY - Vishay Siliconix

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SI9936BDY SPICE Device Model Si9936BDY

The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacita.

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hysical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC DataShee DataSheet4U.com DataSheet4U.com This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 72573 02-Jun-04 www.vishay.com 1 DataSheet4U.com DataSheet 4 U .com www.DataSheet4U.com SPICE Device Model Si9936BDY Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current.

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