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PI6C2502A - Pericom Semiconductor Corporation

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PI6C2502A Phase-Locked Loop Clock Driver

The PI6C2502A features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. Application If a system designer needs more than 16 outputs with the features just described, using two or more zero-de.

Features


• High-Performance Phase-Locked-Loop Clock Distribution for Networking,
• Synchronous DRAM modules for server/workstation/ PC applications
• Allows Clock Input to have Spread Spectrum modulation for EMI reduction
• Zero Input-to-Output delay
• Low jitter: Cycle-to-Cycle jitter ±75ps max.
• On-chip series damping resistor at clock output drivers for low noise and EMI reduction
• Operates at 3.3V VCC
• Wide range of Clock Frequencies 80 to 134 MHz
• Package: Plastic 8-pin SOIC Package (W) Product Description The PI6C2502A features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By.

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