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The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loadin.
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• Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 300ps Internal feedback allows outputs to be synchronized to the clock input 5V tolerant input
* Spread spectrum clock ready Operates at 3.3V VDD Packaging (Pb-free & Green available): -8-pin, 150-mil SOIC (W) -8-pin, 173-mil TSSOP (L)
Description
The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback t.
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| 2 | PI6C2404A-1 |
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| 6 | PI6C2502 |
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| 7 | PI6C2502A |
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| 8 | PI6C2504 |
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| 9 | PI6C2510-133 |
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| 10 | PI6C2516 |
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