The MT5C128K8A1 is organized as a 131,072 x 8 SRAM using a four-transistor memory cell with a high-speed, lowpower CMOS process. Micron SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. This device offers multiple center power and ground pins for improved performance. For flexibility in high-speed memory applications, Micron.
• High speed: 12, 15, 20 and 25ns
• Multiple center power and ground pins for greater noise immunity
• Easy memory expansion with ?C/E and ?O/E options
• Automatic ?C/E power down
• All inputs and outputs are TTL-compatible
• High-performance, low-power, CMOS double-metal process
• Single +5V ± 10% power supply
• Fast ?O/E access times: 6, 8, 10 and 12ns
128K x 8 SRAM
WITH SINGLE CHIP ENABLE, REVOLUTIONARY PINOUT
5V ASYNCHRONOUS SRAM
PIN ASSIGNMENT (Top View) 32-Pin SOJ (SD-5)
A3 A2 A1 A0 CE DQ1 DQ2 Vcc Vss DQ3 DQ4 WE A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | MT5C128K8A1S13A |
Micron Technology |
1M SRAM | |
2 | MT5C1001 |
ASI |
SRAM | |
3 | MT5C1001 |
Micross |
1M x 1 SRAM | |
4 | MT5C1001 |
Micron |
1 Meg x 1 SRAM | |
5 | MT5C1005 |
ASI |
SRAM MEMORY ARRAY | |
6 | MT5C1005 |
Micross |
256K x 4 SRAM | |
7 | MT5C1005 |
Micron |
256K x 4 SRAM | |
8 | MT5C1008 |
ASI |
128K x 8 SRAM WITH DUAL CHIP ENABLE AVAILABLE AS MILITARY SPECIFICATIONS | |
9 | MT5C1008 |
Micron |
128K x 8 SRAM | |
10 | MT5C1008LL |
Austin Semiconductor |
128K x 8 SRAM WITH DUAL CHIP ENABLE ULTRA LOW POWER | |
11 | MT5C1009 |
Micross |
128K x 8 SRAM | |
12 | MT5C1189 |
Micron |
128K x 9 SRAM |