Recherchez avec le numéro de pièce ainsi que le fabricant ou la description
The MPC99J93 Intelligent Dynamic Clock Switch (IDCS) circuit continuously monitors both input CLK signals. Upon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will be latched (H). If that CLK is the primary clock, the IDCS will switch to the good secondary clock and phase/frequency alignment will occur with min.
• Fully Integrated PLL
MPC99J93
Freescale Semiconductor, Inc...
FA SUFFIX 32--LEAD LQFP PACKAGE CASE 873A
•
•
•
•
•
Intelligent Dynamic Clock Switch LVPECL Clock Outputs LVCMOS Control I/O 3.3V Operation 32--Lead LQFP Packaging
Functional Description The MPC99J93 Intelligent Dynamic Clock Switch (IDCS) circuit continuously monitors both input CLK signals. Upon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will be latched (H). If that CLK is the primary clock, the IDCS will switch to the good secondary clock and phase/frequency alignment w.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | MPC990 |
Motorola |
(MPC990 / MPC991) LOW VOLTAGE PLL CLOCK DRIVER |
|
| 2 | MPC992 |
Motorola |
LOW VOLTAGE PLL CLOCK DRIVER |
|
| 3 | MPC993 |
Motorola |
Dynamic Switch PLL Clock Driver |
|
| 4 | MPC9990 |
Motorola |
Low Voltage PLL Clock Driver |
|
| 5 | MPC9992 |
Motorola |
3.3 DIFFRERENTIAL ECL/PECL PLL CLOCK GENERATOR |
|
| 6 | MPC9100 |
Motorola |
DUAL PLL CLOCK GENERATOR |
|
| 7 | MPC9108 |
Motorola |
MULTIPLE OUTPUT CLOCK SYNTHESIZER |
|
| 8 | MPC9109 |
Motorola |
LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP |
|
| 9 | MPC9109 |
Integrated Device Technology |
Low Voltage 1:18 Clock Distribution Chip |
|
| 10 | MPC911 |
Motorola |
LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/HSTL TO HSTL CLOCK DRIVER |
|
| 11 | MPC9120 |
Motorola |
1:10 LVCMOS FANOUT BUFFER |
|
| 12 | MPC9140 |
Motorola |
1:18 LVCMOS FANOUT BUFFER |
|