MPC9331 - Motorola

MPC9331 3.3 V 1:6 LVCMOS PLL Clock Generator

The MPC9331 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9331 requires either the selection of internal PLL feedback or the connection of one of the device outputs to the feedback input to close the PLL feedback path in external feedback mode. The reference clock frequency and the divider for.

Features

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• 1:6 PLL based low-voltage clock generator 3.3 V power supply Generates clock signals up to 240 MHz Maximum output skew of 150 ps Differential LVPECL reference clock input Alternative LVCMOS PLL reference clock input Internal and external PLL feedback Supports zero-delay operation in external feedback mode PLL multiplies the reference clock by 4x, 3x, 2x, 1x, 4/3x, 3/2x, 2/3x, x/2, x/3 or x/4 Synchronous output clock stop in logic low eliminates output runt pulses Power_down feature reduces output clock frequency Drives up to 12 clock lines 32-lead LQFP packagi.