MPC9330 - Motorola

MPC9330 3.3V / 2.5V 1:6 LVCMOS PLL CLOCK GENERATOR

The MPC9330 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9330 requires either the selection of internal PLL feedback or the connection of one of the device outputs to the feedback input to close the PLL feedback path in external feedback mode. The reference clock frequency and the divider for.

Features

• 1:6 PLL based low-voltage clock generator MPC9330 3.3V/2.5V 1:6 LVCMOS PLL CLOCK GENERATOR
•
•
•
•
•
•
•
•
•
•
•
•
•
• 2.5V or 3.3V power supply Generates clock signals up to 200 MHz Maximum output skew of 150 ps1 On-chip crystal oscillator clock reference Alternative LVCMOS PLL reference clock input Internal and external PLL feedback PLL multiplies the reference clock by 4x, 3x, 2x, 1x, 4/3x, 3/2x, 2/3x, x/2, x/3 or x/4 Supports zero-delay operation in external feedback mode Synchronous output clock stop in logic low eliminates output runt pulses Power_down feature reduces output clock .