HYB5117805BJ-60 - Siemens

HYB5117805BJ-60 2M x 8 - Bit Dynamic RAM 2k Refresh

DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) VCC VSS N.C. Semiconductor Group 2 HYB5117805BSJ-50/-60/-70 2M x 8-EDO DRAM P-SOJ-28-3 400 mil VCC I/O1 I/O2 I/O3 I/O4 WE RAS N.C. A10 A0 A1 A2 A3 VCC O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VSS I/O8 I/O7 I/O6 I/O5 CAS OE A9 A8 A7 A6 A5 .

Features

include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL. Ordering Information Type HYB 5117805BJ-50 HYB 5117805BJ-60 HYB 5117805BJ-70 Pin Names A0-A10 A0-A9 RAS OE I/O1-I/O8 CAS WE Row Address Inputs Column Address Inputs Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply (+ 5 V) Ground (0 V) not connected Ordering Code Q67100-Q1104 Q67100-Q1105 Q67100-Q1106 Package P-SOJ-28-3 400 mil P-SOJ-28-3 400 mil P-SOJ-28-3 400 mil Descriptions DRAM (access time 50 ns) DRAM (access.