HEF4075B - NXP

HEF4075B Triple 3-input OR gate

The HEF4075B provides the positive triple 3-input OR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. HEF4075B gates Fig.2 Pinning diagram. HEF4075BP(N): 14-lead DIL; plastic (SOT27-1) HEF4075BD(F): 14-lead DIL; ceramic (cerdip) (SOT73) HEF4075BT(D): 14-lead SO; plastic Fig.1 Functional dia.

Features

R gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays In → On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL 65 30 20 65 30 25 60 30 20 60 30 20 130 60 40 130 60 50 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL TYP. MAX. HEF4075B gates TYPICAL EXTRAPOLATION FORMULA 38 ns + (0,55 ns/pF) CL 19 ns + (0,23 ns/pF) CL 12 ns + (0,16 ns/pF) CL 38 ns + (0,55 ns/pF) CL 19 ns + (0,23 ns/pF) CL 17 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns +.