INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4044B MSI Quadruple R/S latch with 3-state outputs Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconduct.
): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING EO S0 to S3 R0 to R3 O0 to O3 common output enable input set inputs (active LOW) reset inputs (active LOW) 3-state buffered latch outputs FUNCTION TABLE INPUTS EO L H H H Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance OFF-state Fig.1 Functional diagram. FAMILY DATA, IDD LIMITS category MSI See Family Specifications Sn X L X H Rn X H .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF4040B |
NXP |
12-stage binary counter | |
2 | HEF4040B |
nexperia |
12-stage binary ripple counter | |
3 | HEF4040B-Q100 |
nexperia |
12-stage binary ripple counter | |
4 | HEF4041B |
NXP |
Quadruple true/complement buffer | |
5 | HEF4042B |
NXP |
Quadruple D-latch | |
6 | HEF4043B |
NXP |
Quadruple R/S latch with 3-state outputs | |
7 | HEF4043B |
Philips |
Quadruple R/S latch | |
8 | HEF4043B |
nexperia |
Quad R/S latch | |
9 | HEF4043B-Q100 |
nexperia |
Quad R/S latch | |
10 | HEF4046B |
NXP |
Phase-locked loop | |
11 | HEF4046B |
Philips |
Phase-locked loop | |
12 | HEF4046B |
nexperia |
Phase-locked loop |