The HEF4043B-Q100 is a quad R/S latch with 3-state outputs and common output enable input (OE). Each latch has set (nS), and reset (nR) inputs and a 3-state output (nQ). When OE is LOW, the latch outputs are in the high impedance OFF-state. OE does not affect the state of the latch. Inputs include clamp diodes. This enables the use of current limiting resist.
• Automotive product qualification in accordance with AEC-Q100 (Grade 3)
• Specified from -40 °C to +85 °C
• Wide supply voltage range from 3.0 to 15.0 V
• CMOS low power dissipation
• High noise immunity
• Fully static operation
• 5 V, 10 V, and 15 V parametric ratings
• Standardized symmetrical output characteristics
• Complies with JEDEC standard JESD 13-B
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
3. Applications
• Four-bit storage with output enable
4. Ordering information
Table 1..
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF4043B |
NXP |
Quadruple R/S latch with 3-state outputs | |
2 | HEF4043B |
Philips |
Quadruple R/S latch | |
3 | HEF4043B |
nexperia |
Quad R/S latch | |
4 | HEF4040B |
NXP |
12-stage binary counter | |
5 | HEF4040B |
nexperia |
12-stage binary ripple counter | |
6 | HEF4040B-Q100 |
nexperia |
12-stage binary ripple counter | |
7 | HEF4041B |
NXP |
Quadruple true/complement buffer | |
8 | HEF4042B |
NXP |
Quadruple D-latch | |
9 | HEF4044B |
NXP |
Quadruple R/S latch | |
10 | HEF4046B |
NXP |
Phase-locked loop | |
11 | HEF4046B |
Philips |
Phase-locked loop | |
12 | HEF4046B |
nexperia |
Phase-locked loop |