The HEF4041B is a quadruple true/complement buffer which provides both an inverted active LOW output (O) and a non-inverted active HIGH output (O) for each input (I). The buffers exhibit high current output capability suitable for driving TTL or high capacitive loads. HEF4041B buffers Fig.2 Pinning diagram. HEF4041BP(N): HEF4041BD(F): HEF4041BT(D): 14-le.
pplications for the HEF4041B are:
• LOCMOS to DTL/TTL converter
• High current sink and source driver Fig.1 Functional diagram. FAMILY DATA, IDD LIMITS category BUFFERS See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
Quadruple true/complement buffer
DC CHARACTERISTICS VSS = 0 V; VI = VSS or VDD Tamb (°C) VDD V Output (source) current HIGH HIGH Output (sink) current LOW 5 10 15 5 4,75 10 15 VOH V 4,6 9,5 13,5 2,5 0,4 0,5 1,5 IOL −IOH −IOH VOL V SYMBOL −40 +25
HEF4041B buffers
+85 MIN. 1,0 2,7 10,0 3,0 1,35 4,5 15,0 MAX. mA mA mA mA mA mA mA
MIN. MAX..
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF4040B |
NXP |
12-stage binary counter | |
2 | HEF4040B |
nexperia |
12-stage binary ripple counter | |
3 | HEF4040B-Q100 |
nexperia |
12-stage binary ripple counter | |
4 | HEF4042B |
NXP |
Quadruple D-latch | |
5 | HEF4043B |
NXP |
Quadruple R/S latch with 3-state outputs | |
6 | HEF4043B |
Philips |
Quadruple R/S latch | |
7 | HEF4043B |
nexperia |
Quad R/S latch | |
8 | HEF4043B-Q100 |
nexperia |
Quad R/S latch | |
9 | HEF4044B |
NXP |
Quadruple R/S latch | |
10 | HEF4046B |
NXP |
Phase-locked loop | |
11 | HEF4046B |
Philips |
Phase-locked loop | |
12 | HEF4046B |
nexperia |
Phase-locked loop |