The HEF40245B is an octal bus transmitter/receiver designed for 8-line asynchronous, 2-way data communication between data buses. It features output stages with high current output capability suitable for driving highly capacitive loads. The direction input (DR) controls transmission of data from bus A to bus B, or bus B to bus A, depending on its logic leve.
output stages with high current output capability suitable for driving highly capacitive loads. The direction input (DR) controls transmission of data from bus A to bus B, or bus B to bus A, depending on its logic level. The 3-state outputs are controlled by the enable input EO. A HIGH on EO causes the outputs to assume a high impedance OFF-state. The device also features hysteresis on all inputs to improve noise immunity. Schmitt-trigger action in the inputs makes the circuit highly tolerant to slower input rise and fall times. The HEF40245B is pin and functionally compatible with the TTL ‘24.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HEF40240B |
NXP |
Octal inverting buffers with 3-state outputs | |
2 | HEF40244B |
NXP |
Octal buffers with 3-state outputs | |
3 | HEF40244B |
nexperia |
Octal buffers | |
4 | HEF4024B |
NXP |
7-stage binary counter | |
5 | HEF4020B |
NXP |
14-stage binary counter | |
6 | HEF4020B |
nexperia |
14-stage binary counter | |
7 | HEF4020B-Q100 |
nexperia |
14-stage binary counter | |
8 | HEF4021B |
NXP |
8-bit static shift register | |
9 | HEF4021B |
nexperia |
8-bit static shift register | |
10 | HEF4021B-Q100 |
nexperia |
8-bit static shift register | |
11 | HEF4022B |
NXP |
4-stage divide-by-8 Johnson counter | |
12 | HEF4023B |
NXP |
Triple 3-input NAND gate |