HEF4020B-Q100 - nexperia

HEF4020B-Q100 14-stage binary counter

The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a .

Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 3)
• Specified from -40 °C to +85 °C
• Wide supply voltage range from 3.0 V to 15.0 V
• CMOS low power dissipation
• High noise immunity
• High speed operation
• Fully static operation
• 5 V, 10 V, and 15 V parametric ratings
• Standardized symmetrical output characteristics
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
• Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information Type nu.