HD74LS112 Dual J-K Negative-edge-triggered Flip-Flops (with Preset and Clear) REJ03D0426–0300 Rev.3.00 Jul.13.2005 Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS112P DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74LS112FPEL SOP-16 pin (JEITA) PRSP0016DH-B FP (FP-16DAV) HD74LS112RPEL SOP.
• Ordering Information
Part Name
Package Type
Package Code (Previous Code)
Package Abbreviation
HD74LS112P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
HD74LS112FPEL SOP-16 pin (JEITA)
PRSP0016DH-B
FP
(FP-16DAV)
HD74LS112RPEL SOP-16 pin (JEDEC)
PRSP0016DG-A (FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation (Quantity) —
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Pin Arrangement
1CK 1 1K 2 1J 3
1PR 4 1Q 5 1Q 6 2Q 7
GND 8
J CK K PR CLR
Q
Q
K CK J
CLR PR
Q
Q
16 VCC 15 1CLR 14 2CLR 13 2CK 12 2K 11 2J 10 2PR 9 2Q
(Top view)
.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | HD74LS112 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops | |
2 | HD74LS112 |
Renesas |
Dual J-K Negative-edge-triggered Flip-Flops | |
3 | HD74LS11 |
Hitachi Semiconductor |
Triple 3-input Positive AND Gates | |
4 | HD74LS11 |
Renesas |
Triple 3-input Positive AND Gates | |
5 | HD74LS113 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops | |
6 | HD74LS114 |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops | |
7 | HD74LS11P |
Renesas |
Triple 3-input Positive AND Gates | |
8 | HD74LS10 |
Hitachi Semiconductor |
Triple 3-input Positive NAND Gates | |
9 | HD74LS10 |
Renesas |
Triple 3-Input Positive NAND Gates | |
10 | HD74LS107A |
Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops | |
11 | HD74LS107A |
Renesas |
Dual J-K Negative-edge-triggered Flip-Flops | |
12 | HD74LS107AP |
Renesas |
Dual J-K Negative-edge-triggered Flip-Flops |