The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF364A that converts the three LVDS data streams (Up to 1.3 Gbps throughput or 170 Megabytes/ sec bandwidth) back.
n n n n n n n n n n n 20 to 65 MHz shift clock support 50% duty cycle on receiver output clock Best
–in
–Class Set & Hold Times on RxOUTPUTs Rx power consumption < 142 mW (typ) @65MHz Grayscale Rx Power-down mode < 200µW (max) ESD rating > 7 kV (HBM), > 700V (EIAJ) Supports VGA, SVGA, XGA and Dual Pixel SXGA. PLL requires no external components Compatible with TIA/EIA-644 LVDS standard Low profile 56-lead or 48-lead TSSOP package DS90CF384A is also available in a 64 ball, 0.8mm fine pitch ball grid array (FBGA) package
Block Diagrams
DS90CF384A DS90CF364A
10087027
10087028
Order Number DS90C.
The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) b.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DS90CF384 |
National Semiconductor |
+3.3V Programmable LVDS Transmitter | |
2 | DS90CF384AQ |
Texas Instruments |
+3.3V LVDS Receiver | |
3 | DS90CF383 |
National Semiconductor |
+3.3V LVDS Transmitter | |
4 | DS90CF383B |
Texas Instruments |
+3.3V Programmable LVDS Transmitter | |
5 | DS90CF386 |
National Semiconductor |
+3.3V LVDS Receiver | |
6 | DS90CF386 |
Texas Instruments |
3.3-V LVDS Receiver | |
7 | DS90CF388 |
National Semiconductor |
Dual Pixel LVDS Display Interface | |
8 | DS90CF388 |
Texas Instruments |
Dual Pixel LVDS Display Interface | |
9 | DS90CF388A |
National Semiconductor |
Dual Pixel LVDS Display Interface/FPD-Link | |
10 | DS90CF363 |
National Semiconductor |
+3.3V LVDS Transmitter | |
11 | DS90CF363A |
National Semiconductor |
+3.3V Programmable LVDS Transmitter | |
12 | DS90CF363B |
Texas Instruments |
+3.3V Programmable LVDS Transmitter |