The DS90C363A/DS90CF363A transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. At a transmit clock frequency of .
n 20 to 65 MHz shift clock support n Rejects > ± 3ns Jitter from VGA chip with less than 225ps output Jitter @65MHz (TJCC) n Best
–in
–Class Set & Hold Times on TxINPUTs n Tx power consumption < 130 mW (typ) @65MHz Grayscale n > 50% Less Power Dissipation than BiCMOS Alternatives n Tx Power-down mode < 200µW (max) n ESD rating > 7 kV (HBM), > 500V (EIAJ) n Supports VGA, SVGA, XGA and Dual Pixel SXGA. n Narrow bus reduces cable size and cost n Up to 1.3 Gbps throughput n Up to 170 Megabytes/sec bandwidth n 345 mV (typ) swing LVDS devices for low EMI n PLL requires no external components n Compati.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DS90CF363 |
National Semiconductor |
+3.3V LVDS Transmitter | |
2 | DS90CF363B |
Texas Instruments |
+3.3V Programmable LVDS Transmitter | |
3 | DS90CF364 |
Texas Instruments |
+3.3V Programmable LVDS Transmitter | |
4 | DS90CF364A |
Texas Instruments |
+3.3V LVDS Receiver | |
5 | DS90CF364A |
National Semiconductor |
3.3V LVDS Flat Panel Display Link | |
6 | DS90CF366 |
National Semiconductor |
+3.3V LVDS Receiver | |
7 | DS90CF366 |
Texas Instruments |
3.3-V LVDS Receiver | |
8 | DS90CF383 |
National Semiconductor |
+3.3V LVDS Transmitter | |
9 | DS90CF383B |
Texas Instruments |
+3.3V Programmable LVDS Transmitter | |
10 | DS90CF384 |
National Semiconductor |
+3.3V Programmable LVDS Transmitter | |
11 | DS90CF384A |
National Semiconductor |
+3.3V LVDS Receiver | |
12 | DS90CF384A |
Texas Instruments |
+3.3V LVDS Receiver |