The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation .
♦ 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits ♦ On-Chip 512-Bit SHA-1 Engine to Compute 160Bit Message Authentication Codes (MACs) and to Generate Secrets ♦ Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmitting a 160-Bit MAC as Authorization ♦ User-Programmable Page Write Protection for Page 0, Page 3, or All Four Pages Together ♦ User-Programmable OTP EPROM Emulation Mode for Page 1 (“Write to 0”) ♦ Communicates to Host with a Single Digital Signal at 12.5kbps or 35.7kbps Using 1-Wire Protocol ♦ Switchpoint Hysteresis and Filteri.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | DS28E01-100 |
Maxim Integrated |
1Kb Protected 1-Wire EEPROM | |
2 | DS28E04-100 |
Maxim Integrated |
4096-Bit Addressable 1-Wire EEPROM | |
3 | DS28E05 |
Maxim Integrated |
1-Wire EEPROM | |
4 | DS28E07 |
Analog Devices |
1-Wire EEPROM | |
5 | DS28E10 |
Maxim Integrated Products |
1-Wire SHA-1 Authenticator | |
6 | DS28E15 |
Maxim Integrated |
DeepCover Secure Authenticator | |
7 | DS28E16 |
Maxim Integrated |
1-Wire Secure SHA-3 Authenticator | |
8 | DS28E17 |
Maxim Integrated |
1-Wire-to-I2C Master Bridge | |
9 | DS28E17 |
Analog Devices |
1-Wire-to-I2C Controller Bridge | |
10 | DS28E18 |
Maxim Integrated |
1-Wire to I2C/SPI Bridge | |
11 | DS28E22 |
Maxim Integrated |
DeepCover Secure Authenticator | |
12 | DS28E25 |
Maxim Integrated Products |
DeepCover Secure Authenticator |