DS1258Y - Dallas Semiconducotr

DS1258Y 128k x 16 Nonvolatile SRAM

A0 to A16 DQ0 to DQ15 CEU CEL WE OE VCC GND - Address Inputs - Data In/Data Out - Chip Enable Upper Byte - Chip Enable Lower Byte - Write Enable - Output Enable - Power (+5V) - Ground DESCRIPTION The DS1258 128k x 16 nonvolatile (NV) SRAMs are 2,097,152-bit fully static, NV SRAMs, organized as 131,072 words by 16 bits. Each NV SRAM has a self-contained li.

Features

§ § § § § § § § § § 10-Year Minimum Data Retention in the Absence of External Power Data is Automatically Protected During a Power Loss Separate Upper Byte and Lower Byte ChipSelect Inputs Unlimited Write Cycles Low-Power CMOS Read and Write Access Times as Fast as 70ns Lithium Energy Source is Electrically Disconnected to Retain Freshness Until Power is Applied for the First Time Full ±10% Operating Range (DS1258Y) Optional ±5% Operating Range (DS1258AB) Optional Industrial Temperature Range of -40°C to +85°C, Designated IND PIN ASSIGNMENT CEU CEL DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 GND DQ.