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CDCVF2510A - Texas Instruments

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CDCVF2510A 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

The CDCVF2510A is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. The CDCVF2510A uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDCVF2510A operates at a 3.3-V VCC and also pr.

Features

1
• Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1
• Spread Spectrum Clock Compatible
• Operating Frequency 20 MHz to 175 MHz
• Static Phase Error Distribution at 66 MHz to 166 MHz is ±125 ps
• Jitter (cyc
  –cyc) at 66 MHz to 166 MHz is |70| ps
• Advanced Deep Submicron Process Results in More Than 40% Lower Power Consumption vs Current Generation PC133 Devices
• Auto Frequency Detection to Disable Device (Power-Down Mode)
• Available in Plastic 24-Pin TSSOP
• Distributes One Clock Input to One Bank of 10 Outputs
• External Feedback (FBIN) Terminal is Used to Sync.

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