The CDC582 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align the frequency and phase of the clock output signals to the differential LVPECL clock (CLKIN, CLKIN) input signals. It is specifically designed to operate at speeds from 50 MHz to 100 MHz or down to 25 MHz on outputs configured as half-frequ.
2 28 13 27 14 15 16 17 18 19 20 21 22 23 24 25 26 VCC 4Y3 GND VCC 4Y2 GND VCC 4Y1 GND GND VCC 3Y3 GND GND 2Y2 VCC GND 2Y3 VCC GND GND 3Y1 VCC GND 3Y2 VCC description The CDC582 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align the frequency and phase of the clock output signals to the differential LVPECL clock (CLKIN, CLKIN) input signals. It is specifically designed to operate at speeds from 50 MHz to 100 MHz or down to 25 MHz on outputs configured as half-frequency outputs. The CDC582 operates at 3.3-V VCC. The feedback input .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | CDC5801A |
Texas Instruments |
Low Jitter Clock Multiplier/Divider | |
2 | CDC5806 |
Texas Instruments |
THREE PLLs BASED CLOCK GENERATOR | |
3 | CDC586 |
Texas Instruments |
3.3-V Phase-Lock-Loop Clock Driver | |
4 | CDC509 |
Texas Instruments |
3.3-V Phase-Lock-Loop Clock Driver | |
5 | CDC516 |
Texas Instruments |
3.3-V Phase-Lock-Loop Clock Driver | |
6 | CDC536 |
Texas Instruments |
3.3-V Phase-Lock-Loop Clock Driver | |
7 | CDC5D23B |
Sumida Corporation |
(CDC4D20 / CDC5D23B) POWER INDUCTORS | |
8 | CDC-Z137 |
Aiwa |
FM / AM CD Player | |
9 | CDC1104 |
Texas Instruments |
1 to 4 Configurable Clock Buffer | |
10 | CDC111 |
Texas Instruments |
1-LINE TO 9-LINE DIFFERENTIAL LVPECL CLOCK DRIVER | |
11 | CDC1607F-E |
Micronas |
Automotive Controller Specification | |
12 | CDC1631F-E |
Micronas |
Automotive Controller |