AS4C32M16D1A-I - Alliance Semiconductor

AS4C32M16D1A-I 32M x 16 bit DDR Synchronous DRAM

Revision History Revision Details Rev 1.0 Preliminary datasheet AS4C32M16D1A-C&I Date March 2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. 0 Rev. 1.0 Mar. /2015 AS4C32M16D1A-C&I 32M x 16 bit DDR Synchronous.

Features

 Fast clock rate: 200MHz
 Differential Clock CK & CK
 Bi-directional DQS
 DLL enable/disable by EMRS
 Fully synchronous operation
 Internal pipeline architecture
 Four internal banks, 8M x 16-bit for each bank
 Programmable Mode and Extended Mode registers - CAS Latency: 2, 2.5, 3 - Burst length: 2, 4, 8 - Burst Type: Sequential & Interleaved
 Individual byte write mask control
 DM Write Latency = 0
 Auto Refresh and Self Refresh
 8192 refresh cycles / 64ms
 Precharge & active power down
 Power supplies: VDD & VDDQ = 2.5V ± 0.2V
 Ope.